Virtualization techniques in HERMES
The hardware technology of embedded real-time systems has resulted into very powerful, reliable and cost-effective multi-core platforms. This trend has increased interest in software architectures where multiple applications share a multi-core platform as the best solution for embedded real-time systems.
The growing need to reduce size, weight, power consumption, and cost of applications in various markets such as aerospace, automotive, or IoT, has boosted the importance in these multi-core platforms. However, sharing a common hardware platform requires implementing mechanisms to ensure that applications do not interfere with each other. Virtualization solutions play an important role in achieving this lack of interference thanks to its time and space partitioning (TSP) concept.
Virtualization is an operating system paradigm in which a kernel allows multiple isolated computer systems to be hosted on a single physical computer system. These virtual computer systems are often referred to as virtual machines or partitions.
As of today, there are several technologies that enable TSP. Among them, a hypervisor, like XtratuM hypervisor, can implement full virtualization, where the hypervisor provides partitions with an identical interference to that of the underlying hardware platform (i.e. the real/physical machine). Such partition is, therefore, capable of hosting unmodified software. The main advantage of virtualization is the ability to use an unmodified version of the trusted guest operating system, requiring no maintenance associated with custom changes, as the guest OS is completely abstracted from the underlying hardware virtualization layer.
In the context of HERMES, virtualization plays an important role through the use of XtratuM hypervisor. HERMES will enable critical key software tools to fully exploit the quad core ARM R52. Software tools will include the portage of the XtratuM Next Generation (XNG) hypervisor from fentISS and the development of an ECSS qualified genetic boot loader 1 (“BL1”) code, which will provide the FPGA with virtualization.